Внимание! Verilog?

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Verilog HDL: A Guide to Digital Design and Synthesis

Автор: Palnitakar S.


Written for both experienced and new users, this book gives you broad coverage of Verilog HDL. The book stresses the practical design and verification perspective ofVerilog rather than emphasizing only the language aspects. The informationpresented is fully compliant with the IEEE 1364-2001 Verilog HDL standard.


Автор: T. R. Padmanabhan
Название: Design Through Verilog HDL
Издательство: Wiley
Электронная техника
Системный анализ и проектирование

ISBN: 0471441481
ISBN-13(EAN): 9780471441489
Обложка: Hardcover
Страницы: 472 pages
Вес: 0.78 кг.
Дата издания: November 25, 2003
Описание: A comprehensive resource on Verilog HDL for beginners and experts Large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool. Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. Design Through Verilog HDL addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant. Other important topics covered include: Primitives Gate and Net delays Buffers CMOS switches State machine design Further, the authors focus on illuminating the differences between gate level, data flow, and behavioral styles of Verilog, a critical distinction for designers. The books final chapters deal with advanced topics such as timescales, parameters and related constructs, queues, and switch level design. Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, Design Through Verilog HDL provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource.
Дополнительное описание: Кол-во стр.: 472
Формат: 241 x 161
Дата издания: 2003
Илюстрации: References, index
Вес: 777
Круг читателей: undergraduate; postgraduate; research, professional
Наличие на складе:
При оформление заказа до: 21 мар 2008
Ориентировочная дата поставки: 21 апр 2008
При условии наличия книги в издательстве.
Цена: 3302.00 р.
Софья Викторовна
Софья Викторовна
09 марта 2008 18:08